Logic Synthesis

Logic Synthesis

Logic synthesis enables VSLI designers to rapidly lay out the millions of transistors and interconnecting wires that form the circuitry on modern chips, without having to plot each individual logic circuit.

Logic Synthesis People (First 3 people) - Page 0

Valentina Ciriani

Valentina Ciriani

Researcher

Tsutomu Sasao

Tsutomu Sasao

Author

Georg Essl

Georg Essl

Austrian computer scientist