Verilog

Verilog

Verilog, standardized as IEEE 1364, is a hardware description language used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction.

Verilog People (First 2 people) - Page 0

Wladyslaw Grabinski

Wladyslaw Grabinski


Robert Zeidman

Robert Zeidman

American researcher