Die-stacking Architecture
| Use attributes for filter ! | |
| Google books | books.google.com |
|---|---|
| Originally published | June 2015 |
| Authors | Yuan Xie |
| Jishen Zhao | |
| Date of Reg. | |
| Date of Upd. | |
| ID | 1954693 |
About Die-stacking Architecture
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. . . .