PA-RISC
Use attributes for filter ! | |
Bits | 64-bit (32→64) |
---|---|
Endianness | Big |
Version | 2. 0 (1996) |
Designed by | Hewlett-Packard |
Extensions | Multimedia Acceleration eXtensions |
Floating point | 32 64-bit (16 64-bit in PA-RISC 1. 0) |
Date of Reg. | |
Date of Upd. | |
ID | 1301470 |
About PA-RISC
PA-RISC is an instruction set architecture developed by Hewlett-Packard. As the name implies, it is a reduced instruction set computer architecture, where the PA stands for Precision Architecture. The design is also referred to as HP/PA for Hewlett Packard Precision Architecture.